Technical Field
The disclosure relates in general to a layout structure, and more particularly to a layout structure with improved electrostatic discharge protection (ESD).
Description of the Related Art
Electrostatic discharge (ESD) has become one of the major issues affecting the stability and reliability of integrated circuits (IC). Despite the thermal dissipation disadvantages caused by the presence of a buried oxide in silicon-on-insulator (SOI) technology, a grounded-gate NMOS (GGNMOS) using SOI technology has been applied for improving ESD protection due to the advantages of low leakage, low capacitance, latch-up free, and etc.
However, the GGNMOS still cannot provide sufficient ESD protection. Therefore, there is still a continuing need to provide improved ESD protection of SOI technology.